Design Verification Engineer

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Description

APPLE INC has the following available in Austin, Texas. Ensure the quality of the SOC or an IP or subsystem. Review design and architecture specifications and work closely with design & micro-architecture teams. Develop test plans, tests & coverage plans as well as define our next generation verification methodology & test benches. Communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases. Work on one or several of the following types of IP such as Neural Engine hardware, DRAM subsystem, memory controller logic, Encode and Decode systems for ProRes and other codec formats such as VP9, AV1. Hardware security, including cryptographic algorithm implementations, High-Speed IO standards such as PCI Express, DisplayPort, MIPI. Power management and fabric infrastructure, Memory cache management, Memory Management Unit, and Display Subsystem for variety of panels and product. 40 hours/week.

Minimum Qualifications

Bachelor’s degree or foreign equivalent in Electrical Engineering, Electronics Engineering, or a related field.

Experience and/or education must include:

Implementing Computer Architecture to understand micro-architecture
Utilizing System Verilog/UVM to develop test-bench code and test-sequences
Using Python or Perl for scripting
Using NCSIM and Xcelium for waveform debug
Using C++ for writing CPU code
Utilizing assertions writing to verify RTL
Implementing Digital Design knowledge to understand design architecture
Utilizing functional coverage and code coverage understanding to test coverage holes

Preferred Qualifications

n/a