DRAM Design Validation Engineer

Apple is where individual imaginations gather together, committing to the values that lead to great work. Every new product we build, service we create, or Apple Store experience we deliver is the result of us making each other’s ideas stronger. That happens because every one of us shares a belief that we can make something wonderful and share it with the world, changing lives for the better. It’s the diversity of our people and their thinking that inspires the innovation that runs through everything we do. When we bring everybody in, we can do the best work of our lives. Here, you’ll do more than join something — you’ll add something.

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices.

Description

In this position, we will be ensuring the successful integration of DRAM memories with SoC devices for Apple products!

Core Responsibilities could include:

Working with design, verification and integration engineers to ensure memory controller requirements are well defined and cover the scope of DRAM based corner cases

Collaborating with Architecture and DRAM vendors for Apple’s main memory solution

Ensuring DRAM simulation

Ensuring the internal and external DRAM silicon and package level testing

Drive the validation and qualification of DRAM with memory vendors

Debugging RMA material with apparent DRAM related defects

Collaborating with the DRAM vendors to improve test coverage

Drive roadmaps and specs of memory vendors for next technology node devices

Minimum Qualifications

Master's Degree in Electrical Engineering, Computer Engineering or Computer Science

Preferred Qualifications

Expert in DRAM cell architectures

Expert of DRAM memory organization and periphery design for low DRAM power

Expertise in DRAM simulation

Experience in memory interface verification with understanding DDR-PHY and Memory Controller

Experience in LPDDR IO (DDR/DDR2/DDR3/DDR4/DDR5) characterization and qualification

Understanding of memory test patterns

Knowledge of DRAM reliability

Knowledge with innovative packaging technology (POP, TSV, etc.) and their relationship to DRAM signal/power integrity

Previous experience in Failure Analysis of DRAM devices

Excellent hardware and software debug skill

Experience working with the major DRAM vendors

Strong background in computer architecture

Programming experience in C/C++